An integrated circuit (IC) is formed by creating one or more devices (e.g., circuit components) on a semiconductor substrate using a myriad of fabrication processes. As fabrication processes and materials improve, semiconductor device geometries have continued to decrease in size since such devices were first introduced several decades ago. For example, current fabrication processes are producing devices having feature sizes (e.g., the smallest component (or line) that may be created using the process) of less than 65 nm. However, the reduction in size of device geometries frequently introduces new challenges that need to be overcome.
As microelectronic device geometries scale down towards 20 nm, the electrical efficiency of integrated circuit design becomes an issue that impacts product performance. For example, driven by the need to reduce power consumption, the nominal operating supply voltage of these devices has been pushed lower to voltage levels around 1.0 volts or below 1.0 volts. However, common integrated devices and logic testing devices do not operate at these low voltage levels, making the interface between these low voltage devices and common integrated devices a challenging problem.